ICGlue

ICGlue is a C/Tcl based library and tool for scripted generation of hardware description.

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The focus here is on simplifying creation of module hierarchy, connectivity and configuration via register-files. Created output contains modules in a hardware description language (currently only systemverilog/verilog) and register-file documentation.

Features

Major features include:

• Signal and Hierarchy generation
• Register file generation (currently APB)
• Input via Tcl script
• Output generated via (Tcl) templates

Concept

Licensing

GNU GPLv3 (see license).

Acknowledgement

After the initial phase, most of the work for ICGlue was done at the Chair of Highly-Parallel VLSI Systems and Neuro-Microelectronics (HPSN) at TU Dresden (see HPSN). It is inspired by its predecessor icsng developed by Jens-Uwe Schlüssler.

Related Projects

stimc was originally developed to enable simulation of ICGlue generated verilog and c/c++ output but can also be used standalone for verilog-simulation with c/c++ stimuli.